Using memory
- CPU Registers
- Temporary storage
- Caches
- On die Static RAM (SRAM) caches
- External (off-die caches)
- DRAM
- Dynamic Random Access Memory
- Paging systems / Virtual memory
- Bandwidth
- "Width" of the memory bus
- Bytes transferred with each clock cycle
- Memory bandwidth (8, 16, 32, 64 bits)
- Amount of information transferred
- Width of the memory module
- The number of physical chips on the memory module is irrelevant
- Synchronous DRAM (SDRAM)
- Synchronized to bus
- Memory speed identified as throughput in megabytes per second
- SDRAM measured in clock speed: 100 MHz bus= PC100
- DDR, DDR2, and DDR3 measured in throughput
- 1,600 MB/sec = PC-1600
- 3,200 MB/sec = PC-3200
- 6,400 MB/sec = PC-6400
- CAS
- Column Address Strobe
- Column Address Select
- CAS Latency (CL)
- Clock cycles between a memory request sent and data received
- The lower the CL number, the fewer clock cycles and faster the data transfer
- A DDR2 667 MHz CL=4 is faster than a DDR2 667 MHz CL=5
- Used on critical computer systems
- Parity memory
- Additional parity bit
- Won't always detect an error
- Can't correct an error
- Error Correcting Code (ECC)
- Detects errors
- Corrects on the fly
- Not all systems use ECC
- It looks the same as non- ECC memory
- Installed in pairs or trios for maximum throughput
- Memory combinations should match
- Exact matches are best
- Memory module slots are often colored
- Does not refer to the pysical layout of the memory package
- Ranks
- The "groups" of memory on a module that can be independently accessed
- Memory controller moves between the ranks
- Also called "sides"
- May be called "rows" in older documentation
- From the Intel 875P Chipset Memory Configuration Guide
- 1 Rank is single-sided DIMM
- 2 Ranks is a double-sided DIMM
- Check the motherboard documentation to ensure the correct memory
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